Super detailed interpretation of the principle of high current linear power supply (LDO)

The basic principle and introduction of LDO can come to an end, and its internal actual working situation is very complicated. This article is only a guide. I hope it can arouse everyone’s sympathy or solve some doubts. Welcome to pay attention to my official account: Hardware Engineer Watching the Sea . There will be more fresh content regularly.

Introduction to NMOS LDO work

The figure below is a basic block diagram of an NMOS LDO. NMOS LDO generally also works in the saturation region (it will be in the variable resistance region in special cases), so Vg is greater than Vs. Therefore, in addition to the Vin pin, the NMOS LDO generally also has a Vbias. Pin to provide high-voltage driving source for MOS G pole; or there is only one Vin, and the internal CHARGE BUMP is integrated to provide high-voltage driving source for G pole. The general working process is the same as that of PMOS LDO: when Vout decreases, Vfb in the feedback loop will also decrease, and Vg at the output of the error amplifier will increase. As Vg increases, the Ids current also increases, and finally Vout returns to its original level. The status is as follows:

Super detailed interpretation of the principle of high current linear power supply (LDO)

Vout↓–>Vfb↓–>Vg↑–Iout↑–>Vout↑

2. Detailed working principle of NMOS LDO

The figure below is the output characteristic curve of a certain NMOS. Let us combine the above figure and the figure below to analyze. When Vout drops and Vin does not change, then Vds=Vin-Vout, Vds increases, and the MOS operating point shifts from A to B; followed by the feedback loop Start to work, Vfb voltage decreases, after passing the error amplifier, Vg increases, then Vgs=Vg-Vs, Vgs also increases, as can be seen from the figure below, as Vgs increases, MOS current Id gradually rises, which makes Vout gradually Increase, the MOS operating point is transferred from B to C, and the LDO returns to the original operating level.

3. NMOS LDO simulation results

The following figure is a simple 5V to 3.0V NMOS LDO simulation diagram and simulation waveform results. The orange curve is the voltage and the green curve is the current. As the load-side sliding rheostat R4 changes, the load current is also changing, and the output voltage is basically stable. At 3.0V.

Super detailed interpretation of the principle of high current linear power supply (LDO)

4. How much do you know about LDO output capacitance?

Taking into account the stability of the system, the output capacitor of the LDO should be added in principle, but if there are considerations for cost, this capacitor can actually be deleted when certain requirements are met.

5. Dropout voltage

It is analyzed above that PMOS LDO works in the constant current region (saturation region), and there is a certain voltage difference between DS. This voltage difference is often called dropout voltage (Vdo), so if the LDO wants to work stably in the saturation region, the input and output are To meet a certain pressure difference between the two, you can usually consider leaving a margin of 25% in the spec in the application. For example, when Iout=150mA in the figure below, Vdo corresponding to different Vout is also different.

Super detailed interpretation of the principle of high current linear power supply (LDO)

6. Efficiency

The efficiency is not discussed here too much. The power consumed by the LDO itself is approximately equal to the differential pressure * current, so under the same load current, the greater the differential pressure, the higher the power consumption of the LDO, so the differential pressure is slightly lower, which is beneficial to improve efficiency.

7. PSRR

One of the important parameters of LDO and one of the great advantages is that the ripple is small, that is, the PSRR is good. PSRR is the power supply rejection ratio, which is the degree of LDO’s suppression of the input power ripple. The larger the PSRR value, the better. Looking at the PSRR curve, there is a turning point. On the left, the LDO itself plays a leading role, and the right is the output capacitor. The curve on the left of the LDO with good PSRR performance will be higher. If the output capacitance is increased, the curve on the right will rise.

The basic principle and introduction of LDO can come to an end, and its internal actual working situation is very complicated. This article is only a guide. I hope it can arouse everyone’s sympathy or solve some doubts. Welcome to pay attention to my official account: Hardware Engineer Watching the Sea . There will be more fresh content regularly.

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